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71M6513/71M6513H
A Maxim Integrated Products Brand
3 -Phase Energy Meter IC
DATA SHEET
AUGUST 2011
Accumulation Interval m
Accumulation Interval m+1
Accumulation Interval m+2
MUX
cycle 1
MUX
cycle 2
MUX
cycle 3
MUX
cycle n
MUX
cycle 1
MUX
cycle n
MUX
cycle 1
Chop Polarity
Positive
Re-
versed
Positive
Re-
versed
Positive
Re-
versed
Positive
Re-
versed
Positive
Re-
versed
Positive
CE_BUSY interrupt
(falling edge)
XFER_BUSY interrupt
(falling edge)
Figure 21: Chop Polarity w/ Automatic Chopping
If temperature compensation or accurate reading of the die temperature is required, alternate multiplexer cycles have to be
inserted in between the regular cycles. This is done under MPU firmware control by asserting the MUX_ALT bit whenever
necessary. Since die temperature usually changes very slowly, alternate multiplexer cycles have to be inserted very
infrequently. Usually, an alternate multiplexer cycle is inserted once for every accumulation period, i.e. after each
XFER_BUSY interrupt. This sequence is shown in Figure 22.
Accumulation Interval m
Accumulation Interval m+1
Accumulation Interval m+2
alt. MUX
MUX
MUX
MUX
alt. MUX
MUX
alt. MUX
cycle
cycle 2 cycle 3
cycle n
cycle
cycle n
cycle
Chop Polarity
Positive
Re-
versed
Positive
Re-
versed
Positive
Re-
versed
Positive
Re-
versed
Positive
Re-
versed
Positive
CE_BUSY interrupt
XFER_BUSY interrupt
MUX_ALT
Figure 22: Sequence with Alternate Multiplexer Cycles
This sequence has the disadvantage that the alternate multiplexer cycle is always operated with positive connection.
Consequently, DC offset will appear on the temperature measurement, which will decrease the accuracy of this measurement
and thus cause temperature reading and compensation to be less accurate.
The sequence shown in Figure 23 uses the CHOP_EN bits to control the chopper polarity after each XFER_BUSY interrupt.
CHOP_EN is controlled to alternate between 10 (positive) and 01 (reversed) for the first multiplexer cycle following each
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功能描述:计量片上系统 - SoC
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